Responsibilities
- P&R construction flows and analysis flows for PPA (performance, power, area) and reliability (signal/power integrity, etc.)
- Employ good software engineering practices to develop leading-edge EDA/CAD tools for chip development
- Work closely with custom and physical design engineers to train and support them and identify possible improvements and solutions
- You will be directly responsible for the full life-cycle of tool development including flow development, testing, deployment, and maintenance
- Interface with EDA vendors to solve issues, evaluate tools, and improve tools
Requirements
- Strong scripting skills in multiple languages (Shell and Tcl are a must, Perl and Python are good to know)
- Familiar with flow development including creating a good user interface, testing/improving run-time, debugging issues
- Knowledge of EDA tools such as Genus, Innovus, Quantus, Tempus, Joules, Virtuoso, Nanotime, Spice and preferably how they work under the hood
- Strong technical background in VLSI, ASIC, and EDA fundamentals
- Background in physical or custom design is a plus
- Self-starter with passion for growth, ability to quickly learn, enthusiasm for continuous learning and sharing findings across the team
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated
- Ability to work well in a team, multi-task, and be productive under aggressive schedules
Education and Experience
- BS plus 8 years
- MS plus 5 years
Education and Experience
PhD, Master’s Degree or Bachelor’s Degree in technical subject area
Salary
Competitive
Monthly based
Location
Puli Township, Taiwan, Taiwan
Job Overview
Location
Puli Township, Taiwan, Taiwan