Qualifications
- Develop and improve existing flow for logical equivalent check
- Experience with ABORT/NEQ debugging process
- Experience with logical equivalence tools such as Conformal LEC and/or Formality
- Collaborate with tool venders for tool issues debugging and resolving
- Collaborate with cross-functional RTL/PD/DFT teams to come up with custom solutions
- Developing and maintaining in-house CAD tools and flow
- Experience with Conformal ECO/Formality ECO is a plus
- Experience with Conformal Lowpower/VCLP is a plus
- Experience with Low Power implementation flows (UPF) is a plus
- Experience with Physical Synthesis/PNR and also DFT implementation is a plus
- Proficient in programming languages, TCL, Python, Perl
- BS (preferred in EE) plus 8 years
- MS (preferred in EE) plus 5 years
Salary
Competitive
Monthly based
Location
Santa Clara, California, United States
Job Overview
Location
Santa Clara, California, United States